[PR #1770] [MERGED] shader_recompiler: Support VK_AMD_shader_image_load_store_lod for IMAGE_STORE_MIP #2291

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opened 2026-02-27 21:15:55 +03:00 by kerem · 0 comments

kerem commented

2026-02-27 21:15:55 +03:00

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📋 Pull Request Information

Original PR: https://github.com/shadps4-emu/shadPS4/pull/1770
Author: @squidbus
Created: 12/14/2024
Status: ✅ Merged
Merged: 12/14/2024
Merged by: @raphaelthegreat

Base: main ← Head: image-mip

📝 Commits (2)

e899863 shader_recompiler: Support VK_AMD_shader_image_load_store_lod for IMAGE_STORE_MIP
41421cf emit_spirv: Fix missing extension declaration.

📊 Changes

13 files changed (+61 additions, -31 deletions)

View changed files

📝 src/shader_recompiler/backend/spirv/emit_spirv.cpp (+4 -0)
📝 src/shader_recompiler/backend/spirv/emit_spirv_image.cpp (+12 -5)
📝 src/shader_recompiler/backend/spirv/emit_spirv_instructions.h (+4 -4)
📝 src/shader_recompiler/frontend/translate/translate.h (+1 -1)
📝 src/shader_recompiler/frontend/translate/vector_memory.cpp (+8 -3)
📝 src/shader_recompiler/ir/ir_emitter.cpp (+9 -8)
📝 src/shader_recompiler/ir/ir_emitter.h (+6 -4)
📝 src/shader_recompiler/ir/opcodes.inc (+3 -3)
📝 src/shader_recompiler/ir/passes/resource_tracking_pass.cpp (+5 -3)
📝 src/shader_recompiler/profile.h (+1 -0)
📝 src/video_core/renderer_vulkan/vk_instance.cpp (+1 -0)
📝 src/video_core/renderer_vulkan/vk_instance.h (+6 -0)
📝 src/video_core/renderer_vulkan/vk_pipeline_cache.cpp (+1 -0)

📄 Description

Wires up the texture instruction parameters and argument filling to support IMAGE_STORE_MIP in IR.
- Added parameters or swapped order slightly for ImageRead/Write/Fetch so LOD is always the same argument index, for easier patching in resource tracking pass.
For SPIR-V, implements ImageWrite with LOD using VK_AMD_shader_image_load_store_lod.
- This is a trivial implementation available only on AMD and Apple GPUs, will need emulated fallback for other GPUs using separate mip bindings.

Used by CUSA03694.

_{🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.}

## 📋 Pull Request Information **Original PR:** https://github.com/shadps4-emu/shadPS4/pull/1770 **Author:** [@squidbus](https://github.com/squidbus) **Created:** 12/14/2024 **Status:** ✅ Merged **Merged:** 12/14/2024 **Merged by:** [@raphaelthegreat](https://github.com/raphaelthegreat) **Base:** `main` ← **Head:** `image-mip` --- ### 📝 Commits (2) - [`e899863`](https://github.com/shadps4-emu/shadPS4/commit/e899863f727ac7d4d6955e508a05df4a9f1c5e4e) shader_recompiler: Support VK_AMD_shader_image_load_store_lod for IMAGE_STORE_MIP - [`41421cf`](https://github.com/shadps4-emu/shadPS4/commit/41421cfbfcd12df5a2bff41eb1bdcb2361557f4d) emit_spirv: Fix missing extension declaration. ### 📊 Changes **13 files changed** (+61 additions, -31 deletions) <details> <summary>View changed files</summary> 📝 `src/shader_recompiler/backend/spirv/emit_spirv.cpp` (+4 -0) 📝 `src/shader_recompiler/backend/spirv/emit_spirv_image.cpp` (+12 -5) 📝 `src/shader_recompiler/backend/spirv/emit_spirv_instructions.h` (+4 -4) 📝 `src/shader_recompiler/frontend/translate/translate.h` (+1 -1) 📝 `src/shader_recompiler/frontend/translate/vector_memory.cpp` (+8 -3) 📝 `src/shader_recompiler/ir/ir_emitter.cpp` (+9 -8) 📝 `src/shader_recompiler/ir/ir_emitter.h` (+6 -4) 📝 `src/shader_recompiler/ir/opcodes.inc` (+3 -3) 📝 `src/shader_recompiler/ir/passes/resource_tracking_pass.cpp` (+5 -3) 📝 `src/shader_recompiler/profile.h` (+1 -0) 📝 `src/video_core/renderer_vulkan/vk_instance.cpp` (+1 -0) 📝 `src/video_core/renderer_vulkan/vk_instance.h` (+6 -0) 📝 `src/video_core/renderer_vulkan/vk_pipeline_cache.cpp` (+1 -0) </details> ### 📄 Description * Wires up the texture instruction parameters and argument filling to support `IMAGE_STORE_MIP` in IR. * Added parameters or swapped order slightly for `ImageRead/Write/Fetch` so LOD is always the same argument index, for easier patching in resource tracking pass. * For SPIR-V, implements `ImageWrite` with LOD using `VK_AMD_shader_image_load_store_lod`. * This is a trivial implementation available only on AMD and Apple GPUs, will need emulated fallback for other GPUs using separate mip bindings. Used by CUSA03694. --- <sub>🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.</sub>