[PR #543] [MERGED] video_core: Bloodborne stabilization pt1 #1622

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opened 2026-02-27 21:13:19 +03:00 by kerem · 0 comments

kerem commented

2026-02-27 21:13:19 +03:00

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📋 Pull Request Information

Original PR: https://github.com/shadps4-emu/shadPS4/pull/543
Author: @raphaelthegreat
Created: 8/23/2024
Status: ✅ Merged
Merged: 8/24/2024
Merged by: @raphaelthegreat

Base: main ← Head: bb-stab

📝 Commits (10+)

4eda045 shader_recompiler: Writelane elimination pass + null image fix
03c8b35 spirv: Implement image derivatives
64bba7f texture_cache: Reduce page bit size
95a9772 clang format
f5bf701 slot_vector: Back to debug assert
a8c4f44 vk_graphics_pipeline: Handle null tsharp
eb306bb spirv: Revert some change
9f0b9ba vk_instance: Support primitive restart on list topology
e7dcd9c page_manager: Adjust windows exception handler
2395546 clang format

📊 Changes

25 files changed (+187 additions, -107 deletions)

View changed files

📝 src/common/slot_vector.h (+7 -15)
📝 src/core/libraries/kernel/thread_management.cpp (+0 -1)
📝 src/shader_recompiler/backend/spirv/emit_spirv_image.cpp (+28 -5)
📝 src/shader_recompiler/backend/spirv/emit_spirv_instructions.h (+5 -2)
📝 src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp (+12 -0)
📝 src/shader_recompiler/frontend/translate/data_share.cpp (+9 -7)
📝 src/shader_recompiler/frontend/translate/scalar_alu.cpp (+5 -2)
📝 src/shader_recompiler/frontend/translate/vector_memory.cpp (+18 -6)
📝 src/shader_recompiler/ir/ir_emitter.cpp (+12 -4)
📝 src/shader_recompiler/ir/ir_emitter.h (+3 -1)
📝 src/shader_recompiler/ir/opcodes.inc (+14 -12)
📝 src/shader_recompiler/ir/passes/constant_propogation_pass.cpp (+14 -0)
📝 src/shader_recompiler/ir/passes/resource_tracking_pass.cpp (+14 -17)
📝 src/shader_recompiler/ir/passes/ssa_rewrite_pass.cpp (+1 -19)
📝 src/shader_recompiler/ir/reg.h (+1 -0)
📝 src/shader_recompiler/recompiler.cpp (+1 -1)
📝 src/video_core/amdgpu/resource.h (+4 -0)
📝 src/video_core/page_manager.cpp (+4 -2)
📝 src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp (+12 -7)
📝 src/video_core/renderer_vulkan/vk_instance.cpp (+8 -0)

...and 5 more files

📄 Description

Implements some missing features in shader recompiler. When this is merged we wont have to skip any graphics shaders anymore (for compute it's still needed due to usage of DS_APPEND)

Most sharp related crashes were in shaders that used a specific pattern of preserving SGPRs. Because these registers are much fewer than VGPRs the compiler might choose to broadcast them to certain scratch VGPRs of specific lanes with V_WRITELANE_B32. When they are needed V_READLANE_B32 is used to read them back. The pattern is as follows:

/*00000000001c*/ s_load_dwordx8  s[16:23], s[14:15], 0x20
/*000000000024*/ v_writelane_b32 v3, s16, 2
/*000000000028*/ v_writelane_b32 v3, s17, 3
/*00000000002c*/ v_writelane_b32 v3, s18, 4
/*000000000030*/ v_writelane_b32 v3, s19, 5
...
/*000000000780*/ v_readlane_b32  s28, v3, 2
/*000000000784*/ v_readlane_b32  s29, v3, 3
/*000000000788*/ v_readlane_b32  s30, v3, 4
/*00000000078c*/ v_readlane_b32  s31, v3, 5
/*000000000790*/ s_buffer_load_dwordx4 s[28:31], s[28:31], 0x4c

Our writelane stub proved to be wrong here, since it would overwrite the VGPR completely, making all previous lane writes invisible. To fix this, dedicated IR instructions for ReadLane and WriteLane have been added. The WriteLane IR op interface is based on WriteInvocationAMD added in SPV_AMD_shader_ballot. A constant propagation pass has been added which detects ReadLane instructions whose value comes directly from a WriteLane (no operations that modify the VGPR in between) and eliminates it with the actual SSA value. This allows the resource tracking pass to work properly and fix invalid trackings.

Also implemented image derivatives specifically for 2D images (supporting more than that is a bit tricky, for later ig).

_{🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.}

## 📋 Pull Request Information **Original PR:** https://github.com/shadps4-emu/shadPS4/pull/543 **Author:** [@raphaelthegreat](https://github.com/raphaelthegreat) **Created:** 8/23/2024 **Status:** ✅ Merged **Merged:** 8/24/2024 **Merged by:** [@raphaelthegreat](https://github.com/raphaelthegreat) **Base:** `main` ← **Head:** `bb-stab` --- ### 📝 Commits (10+) - [`4eda045`](https://github.com/shadps4-emu/shadPS4/commit/4eda0452b5b1ffb983fa6eaa8e716594811a1f79) shader_recompiler: Writelane elimination pass + null image fix - [`03c8b35`](https://github.com/shadps4-emu/shadPS4/commit/03c8b3515dff6da6c4b4f830b7b1f944ba2300bc) spirv: Implement image derivatives - [`64bba7f`](https://github.com/shadps4-emu/shadPS4/commit/64bba7f14ff50f0ecd289907c2ec592fed6808a8) texture_cache: Reduce page bit size - [`95a9772`](https://github.com/shadps4-emu/shadPS4/commit/95a97723ba1033eae5ddd6e849ca9d58e17f92d4) clang format - [`f5bf701`](https://github.com/shadps4-emu/shadPS4/commit/f5bf701618eb6fecc099771dcd39956dc17290e0) slot_vector: Back to debug assert - [`a8c4f44`](https://github.com/shadps4-emu/shadPS4/commit/a8c4f4450ce3ebf3129b4a8e246811366712461c) vk_graphics_pipeline: Handle null tsharp - [`eb306bb`](https://github.com/shadps4-emu/shadPS4/commit/eb306bb9a443f731d7817dd2cbdc270e081a6a62) spirv: Revert some change - [`9f0b9ba`](https://github.com/shadps4-emu/shadPS4/commit/9f0b9ba99bbea83707f75fbf79cd261143d75f55) vk_instance: Support primitive restart on list topology - [`e7dcd9c`](https://github.com/shadps4-emu/shadPS4/commit/e7dcd9cf3a79fe000b350aff2a45c660e870fe1c) page_manager: Adjust windows exception handler - [`2395546`](https://github.com/shadps4-emu/shadPS4/commit/2395546bf97906e188d085aa50998056c4e1a37c) clang format ### 📊 Changes **25 files changed** (+187 additions, -107 deletions) <details> <summary>View changed files</summary> 📝 `src/common/slot_vector.h` (+7 -15) 📝 `src/core/libraries/kernel/thread_management.cpp` (+0 -1) 📝 `src/shader_recompiler/backend/spirv/emit_spirv_image.cpp` (+28 -5) 📝 `src/shader_recompiler/backend/spirv/emit_spirv_instructions.h` (+5 -2) 📝 `src/shader_recompiler/backend/spirv/emit_spirv_warp.cpp` (+12 -0) 📝 `src/shader_recompiler/frontend/translate/data_share.cpp` (+9 -7) 📝 `src/shader_recompiler/frontend/translate/scalar_alu.cpp` (+5 -2) 📝 `src/shader_recompiler/frontend/translate/vector_memory.cpp` (+18 -6) 📝 `src/shader_recompiler/ir/ir_emitter.cpp` (+12 -4) 📝 `src/shader_recompiler/ir/ir_emitter.h` (+3 -1) 📝 `src/shader_recompiler/ir/opcodes.inc` (+14 -12) 📝 `src/shader_recompiler/ir/passes/constant_propogation_pass.cpp` (+14 -0) 📝 `src/shader_recompiler/ir/passes/resource_tracking_pass.cpp` (+14 -17) 📝 `src/shader_recompiler/ir/passes/ssa_rewrite_pass.cpp` (+1 -19) 📝 `src/shader_recompiler/ir/reg.h` (+1 -0) 📝 `src/shader_recompiler/recompiler.cpp` (+1 -1) 📝 `src/video_core/amdgpu/resource.h` (+4 -0) 📝 `src/video_core/page_manager.cpp` (+4 -2) 📝 `src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp` (+12 -7) 📝 `src/video_core/renderer_vulkan/vk_instance.cpp` (+8 -0) _...and 5 more files_ </details> ### 📄 Description Implements some missing features in shader recompiler. When this is merged we wont have to skip any graphics shaders anymore (for compute it's still needed due to usage of DS_APPEND) Most sharp related crashes were in shaders that used a specific pattern of preserving SGPRs. Because these registers are much fewer than VGPRs the compiler might choose to broadcast them to certain scratch VGPRs of specific lanes with V_WRITELANE_B32. When they are needed V_READLANE_B32 is used to read them back. The pattern is as follows: ``` /*00000000001c*/ s_load_dwordx8 s[16:23], s[14:15], 0x20 /*000000000024*/ v_writelane_b32 v3, s16, 2 /*000000000028*/ v_writelane_b32 v3, s17, 3 /*00000000002c*/ v_writelane_b32 v3, s18, 4 /*000000000030*/ v_writelane_b32 v3, s19, 5 ... /*000000000780*/ v_readlane_b32 s28, v3, 2 /*000000000784*/ v_readlane_b32 s29, v3, 3 /*000000000788*/ v_readlane_b32 s30, v3, 4 /*00000000078c*/ v_readlane_b32 s31, v3, 5 /*000000000790*/ s_buffer_load_dwordx4 s[28:31], s[28:31], 0x4c ``` Our writelane stub proved to be wrong here, since it would overwrite the VGPR completely, making all previous lane writes invisible. To fix this, dedicated IR instructions for ReadLane and WriteLane have been added. The WriteLane IR op interface is based on WriteInvocationAMD added in SPV_AMD_shader_ballot. A constant propagation pass has been added which detects ReadLane instructions whose value comes directly from a WriteLane (no operations that modify the VGPR in between) and eliminates it with the actual SSA value. This allows the resource tracking pass to work properly and fix invalid trackings. Also implemented image derivatives specifically for 2D images (supporting more than that is a bit tricky, for later ig). --- <sub>🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.</sub>